摘要
基于目前工业上广泛应用的高精度数字Δ∑调制器,提出了一个创新的改进结构。该结构性能优良,信噪比达到100dB,而且面积和功耗都有大幅度减少。首先简要介绍Δ∑调制器的原理,并分析了目前具代表性的数字Δ∑调制器。然后阐述了改进结构的原理和实现方式。最后通过电路设计数据给出结论。
In this paper, a high performance digital ΔΣ modulator is introduced with improved structure. The modulator is optimized with less power consumption and smaller size while maintaining the high SNR of 100 dB. In the first section, the principle and background of ΔΣ modulator are introduced. The improved structure and algorithm are addressed in the second section. The experimental results are shown in the last section.
出处
《微电子学与计算机》
CSCD
北大核心
2008年第1期116-119,共4页
Microelectronics & Computer