摘要
本文介绍了基于FPGA的异步收发器模块的一种设计方案,在该方案中通过设计完备的状态机来实现异步数据的发送和接收。该设计方案已应用在VXI总线误码仪模块的设计中,各项技术指标满足VXI总线误码仪模块指标要求。
The paper introduce a design of UART module based on FPGA. We realize the transmit and receive of UART by design perfect state machine.The design had used in the project of VXI Bus Bit Error Ratio Teeter, the performance meet the technical request for VXI Bus Bit Error Ratio Tester.
出处
《电子质量》
2008年第1期14-16,共3页
Electronics Quality