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基于FPGA的DVB-S2通用LDPC编码器设计与实现 被引量:8

Design and Implementation of Universal LDPC Code Encoder in the DVB-S2 Based on FPGA
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摘要 研究了一种用FPGA实现DVB-S2标准的LDPC码高速通用编码器的设计方法。设计采用流水线技术和全并行结构相结合的方法,提高了编码效率。FPGA仿真结果和综合报告表明,设计的LDPC码编码器具有通用性,能够针对DVB-S2中两种码长、11种码率的LDPC码进行编码,且时钟频率达到了114MHz,适用于DVB-S2标准。 This paper describes a design method of universal high-speed LDPC code encoder in the DVB-S2 using FPGA. The design method, combining pipelining technique with parallel structure, has realized universal LDPCcode encoder , and improved the efficiency of encoder. FPGA report shows that the encoder accords with the demands for LDPC code of two code lengths and eleven code rates in DVB-S2 standard and can be used by the standard.
出处 《通信技术》 2008年第1期12-14,共3页 Communications Technology
基金 国家自然科学基金资助项目 新一代空管数据系统中高效纠错编码技术研究(编号:60572176)
关键词 DYB-S2 低密度奇偶校验码 现场可编辑门阵列 通用编码器 DVB-S2 LDPC code FPGA universal encoder
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参考文献6

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同被引文献38

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