一种基于活跃周期的低端口数低能耗寄存器堆设计

Active-Cycle Based Register File Design for Reduced Ports and Energy

多端口寄存器堆有助于挖掘指令级和线程级并行性,但同时带来面积、能耗和访问时间的压力.文章面向超标量和SMT处理器,给出了一种方法,即通过增加一个小的活跃值堆(Active Value File,AVF)选择性地保存处于活跃周期(从产生到最后一次使用之间)的物理寄存器值.AVF结构可分担主寄存器堆的访问压力并降低端口数目,实现简单且具有写过滤的特点.在获得较大幅度能耗降低的同时不影响时钟频率且IPC损失较小.

Multi-ported register file helps exploiting instruction-level and thread-level parallelism but brings area, energy and access time pressure. Oriented for superscalar and SMT processor, this paper give a method that is to manage a small auxiliary active value file （AVF） and selectively store physical register values in active cycle （during the time between production and last use）. The AVF structure can share the register file access pressure and reduce the number of register ports, is simple to implement, and can filter some writes. It achieves significant energy savings with no impact on frequency and only small IPC loss.