高可靠8051中系统管理单元的设计与实现

Design and Implementation of the System Management Unit in the Highly Reliable 8051

微处理器的应用领域越来越广泛。由于应用环境的复杂,微处理器面临的各种干扰日益严重,从而对它的可靠性要求越来越高。针对微处理器最常见的故障源——单粒子翻转效应,本文分析了常用的三模冗余(TMR)技术,并采用了一种新的冗余技术——时空三模冗余技术(ST-TMR)对8051微处理器中的系统管理单元进行加固。最后,对其可靠性进行了测试与分析。

The application field of microprocessors is more and more widespread. Meanwhile, the complicated environment makes it face various interferences that are more and more serious and makes the requirements for its reliability higher and higher. As for the most common fault source of microprocessors,which is the Single Event Upsets, this paper analyzes the common reliability technique which is called the Triple Module Redundancy （TMR）, and uses a new redundancy technique named the Space and Time TMR （ST-TMR） to strengthen the system management unit in the microprocessor 8051. Finally, its reliability is tested and analyzed in detail.