基于Nios II软核的运动目标检测系统设计

Design of the motion detection on chip system based on Nios II

介绍了一种基于Nios II的运动视频检测片上系统,该系统通过采用软/硬件协同设计的方法,使用Altera EP2C35 FPGA芯片与HV7131R视频摄像头配合实现了高速的数字视频处理,选用SDRAM和FLASH作为视频数据的外部存储器,满足了运动检测和保存运动现场的需要。并且采用Verilog HDL和Nios II定制指令使用硬件实现了系统的大部分功能,提高系统的处理速度,同时具有良好的灵活性和适应性。

This article describes a motion detection on chip system based on Nios II core and hardware-software co-design method. In view of the requirements of motion detection, this system implements high speed digital video processing by using HV7131R video processing chips and Altera EP2C35 FPGA with SDRAM and FLASH as the outer memory to store video data. By using Verilog HDL and Nios Ⅱ custom instruction, the system design improves the processing speed, and the system also has good flexibility and adaptability.