高效双Hash线速浮动字符串匹配

Wire Speed and High Effective Double Hash Floating Pattern Matching

提出了一种在FPGA上易于实现的高效双Hash浮动字符串匹配算法,其优点是消耗FPGA资源少,处理速度快,并且模式串可以方便地在线更新。

This paper presents a high effective double hash floating pattern matching algorithm, which can be implemented on an FPGA easily. The advantages of our algorithm are lower FPGA resource consumption, higher processing speed and the patterns can be expediently updated on line.