JTAG调试通信接口的软件模拟

Simulation of JTAG Debug Communication Interface

介绍了对处理器中JTAG调试通信接口的软件模拟方法。JTAG接口负责连接主机端与目标处理器,其由tdi、tms、tck和tdo构成,其中tck是tap控制器的时钟控制信号,比处理器的主频小几个数量级;Tms是tap状态机控制信号,tdi和tdo分别是串行数据输入和输出信号。主机端的这种时钟信号是脉冲性的,不具有周期性,给模拟主机端同目标处理器的通信带来困难。利用当前主流操作系统中的多任务环境,给主机和目标处理器分配不同的进程,结合共享内存机制和进程间通信机制有效地实现了对JTAG调试接口信号的软件模拟。这种方法目前已经用在了GodsonX处理器的JTAG调试系统中。

This article introduces a method for simulating JTAG debug communication interface in processor. JTAG interface is used in connecting host and target machines. JTAG interface is composed of tck, tins, tdi and tdo signal. Tck is clock signal, the frequency of which is less than cpu frequency in large scale. Tms is state control signal of tap controller. Tdi and tdo are serial data in and out signal. Clock signal in host machine is pulse signal and is nonperiodic, all these make communication between host and target machines difficult. Based on the multi-task environment in current mainstream operating system, one can allocate two processes for host and target machines. Through memory share mechanism and interprocess communication mechanism, one can simulate JTAG debug communication interface truly. This method is used in JTAG debug system for GodsonX processor now.