摘要
在等平面S工艺基础上,开发了一种ECL超高速D触发器的IC工艺制作技术,并优化其关键工艺,得出一套新的工艺控制方案和参数。用该工艺技术制作的晶体管截止频率fT最大值为5.4CHz(Vce=5V):制作的ECL超高速D触发器,在功耗电流只有30mA情况下,工作频率典型值为850MHz,最高可达900MHz以上,较好地解决了器件速度与功耗的矛盾。
A novel Ic Process Technology for very high-speed ECL D-type flip-flops has been in- vestigated based on the isoplanar S process. The critical process of the technology is optimized and a novel scheme for process control and a. set of pararneter. have been derived. Transistors fabricat- ed with this technology has a maximum Of 5. 4 GHz for =5 V The ECL high speed D-type flip-flop developed with the process has a typical operating frequency of 850 MH. (max> 900 MHz) at a power dissipation of 30 mA.
出处
《微电子学》
CAS
CSCD
北大核心
1997年第4期243-246,共4页
Microelectronics
关键词
集成电路
ECL
D触发器
双极工艺
IC process, ECL . D-type flip-flop , Bipolar process EEACC 2550