汇聚路径指令级重用性能优化研究

Convergence path instruction-level reuse high performance optimization mechanism

针对特定的单边吊床结构,根据C语言编译后生成的代码特征对控制无关Y-行为的特例——误预测指令流重新精确汇聚到正确路径进行动态检测,并利用指令重用降低分支误预测代价,对处理器性能进行优化.实现跨基本块的控制无关Y-行为动态检测,并将相关信息保存到处理器前端汇聚点表中;通过寄存器集成与存储器集成保证正确的相关性;为实现汇聚路径指令级重用,将指令分为可信与不可信两种;可信指令直接提交,不可信指令被插入到恢复缓冲中重新执行.避免了处理器清空流水线和取指重定向,降低了误预测代价.实验表明,对于不同测试基准处理器性能均有所提升,而且随着流水线的加长该机制更加有效.

To optimize processor performance, the control independence Y-behavior that the wrong path instruction stream converges again to the correct path, were dynamically detected. And the corresponding branches were saved in a convergence table. Register integration and memory integration were adopted to keep the right dependency. Instructions on convergence path were divided into trustworthy and non-trustworthy categories, which were separately reused and inserted into the recovery buffer. Then the non-trustworthy instructions were reissued from recovery buffer and re-executed. Thus the branch misprediction penalty was reduced, which optimized processor performance. Experimental results verify the feasibility of this performance optimization mechanism across all benchmarks, and it will be more effective for deeper pipeline processors.