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PCI Express数据链路层缓冲器结构的改进

Improvement for Data Link Layer of PCI Express
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摘要 提出了一种有效的设计方案来改进PCI Express结构的性能;这对于在虚拟通道中的重传缓冲器及流量类别缓冲器实现PCI Ex-press体系来说是十分必要的;首先简要介绍了PCI Express的结构,接着介绍了缓冲器的概念结构,随之提出了一个较高效率的缓冲器管理方案,最后给出了仿真与测试结果;该方案将分立的缓冲器合并成一个缓冲器,同时动态调节重传缓冲器和流量类别缓冲器大小以有效地支持PCI Express的需求命令;模拟结果显示,这比传统的使用分立缓冲器的方案性能提高了30%左右。 An efficient buffer management scheme is proposed to increase performance of the PCI Express architecture. It is necessary for the several buffers such as replay buffer in virtual channel and traffic class buyers to implement the PCI Express architecture. The passage first makes a brief introduction about the configuration of PC I Express, then talks about the buffers' concept configuration, and brings forward an effective scheme on buffers management. At last it offers the results of the simulation and the test'. The proposed scheme merges the buffers into only one buffer and dynamically adjusts the size of the replay buffer space and traffic class buffers space to effectively support the ordering requirements of the PCI Express. The simulation result shows 30% performance improvement over the conventional scheme that uses separated buffers.
出处 《计算机测量与控制》 CSCD 2008年第2期197-199,202,共4页 Computer Measurement &Control
关键词 PCI EXPRESS 数据链路层 缓冲器 PCI Express data link layer buffer
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参考文献3

  • 1Budruk R,et al.PCI Express系统体系结构[M].田玉敏,王崧,张波,译.北京:电子工业出版社,2005.
  • 2PCI SIG, PCI Express Base Specifications Revision 1.0a [ S]. PCI SIG, 2003.
  • 3Hyun E, Seong K S. The Effective Buffer Architecture for Data Link Layer of PCI.

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