基于FPGA的智能脱扣器设计

Design of Intelligent Releaser Based on FPGA

介绍了一种基于现场可编程门阵列的智能脱扣器,阐述了其硬件系统的原理和具体设计电路,并对软件设计要点进行了介绍。该脱扣器通过采集电流信号,完成断路器基本三段电流保护功能和可选的接地保护功能,同时,还具有包括测量、显示、记忆、预报警、自检、通信、ZSI和状态在线监测等附加功能。

An intelligent releaser based on field programmable gate array was introduced. The principle and circuit of its hardware system were expounded, and the key points of software design was introduced. This releaser which collects current signal achieves basic three-level current protection and selectable earthed fault protection functions, meanwhile,it includes appended functions, such as measure, display, memory, beforehand alarm, self-examine, communication, ZSI and on-line state monitor.