一种1.8V 10位120MS/s CMOS电流舵D/A转换器IP核

An Embedded 1.8V 10bit 120MS/s CMOS Current Steering Digital-to-Analog Converter IP Core

采用低摆幅低交叉点的高速CMOS电流开关驱动器结构和中心对称Q2随机游动对策拓扑方式的pMOS电流源阵列版图布局方式,基于TSMC0.18μm CMOS工艺实现了一种1.8V10位120MS/s分段温度计译码电流舵CMOS电流舵D/A转换器IP核.当电源电压为1.8V时,D/A转换器的微分非线性误差和积分非线性误差分别为0.25LSB和0.45LSB,当采样频率为120MHz,输出频率为24.225MHz时的SFDR为64.9dB.10位D/A转换器的有效版图面积为0.43mm×0.52mm,符合SOC的嵌入式设计要求.

Based on a low swing,low crossing point current switch driver and central symmetry Q^2 random walk pMOS current source layout routing methods,a 1.8V 10bit 120MS/s CMOS current-steering digital-to-analog converter IP core is implemented in a TSMC 0. 18μm CMOS process. With a supply of 1.8V,the integral and differential nonlinearity are measured to be less than 0.45LSB and 0. 25LSB,respectively. When the output signal frequency is 24. 225MHz at 120MHz sampling rate, the SFDR is measured to be 64. 9dB. The die area is about 0. 43mm × 0.52mm.