GF（2^m）域上可配置ECC算术模块的设计与实现

Design and Implementation of Reconfigurable ECC Arithmetic Unit in GF（2m）

提出一种应用于可配置椭圆曲线密码体制的有限域多项式算术模块结构,乘法器基于已有的digit-serial结构乘法器,利用局部并行的bit-parallel结构,省去了模约简电路,使乘法器可适用于任意不可约多项式。平方器结构利用LSB或LSD乘法器以及加法器来计算模平方,通过数据接口控制输入数据的格式,可以满足不同域值有限域点乘运算的需求。

A finite field polynomial arithmetic unit architecture is proposed in this paper for reconfigurable ECC. The multiplier based on previous digit-serial multiplier architecture uses bit-parallel architecture of local parallel to eliminate reduction modulo circuit effectively, and the multiplier architecture is the same with arbitrary irreducible polynomials. The squaring architecture computes squares by using an LSB, or an LSD multiplier with an adder. Data format of import is controlled through data interface, which achieves requirements of point multiplication for different finite fields.