ISO/IEC18000-6B标签逻辑电路低面积设计

Low Cost Logical Design of RFID Tag Based on ISO/IEC 18000-6B Protocol

简要介绍了射频识别技术(RFID)协议ISO/IEC18000-6B的通信,并基于该协议用VHDL语言设计了标签的逻辑部分电路。设计时运用命令分类、实时处理、资源共享等技术减少硬件资源,在SMIC0.18μm工艺下综合为24791μm2,并用Primepower测得功耗约10.6μW。设计采用Xilinx的FPGA开发平台进行了验证,逻辑分析仪结果表明设计满足要求。该电路应用于ISO/IEC18000-6B协议下RFID标签的数字部分。

ISO/IEC18000-6B protocol of RFID was introduced, based on which a logical circuit of a tag was designed using VHDL language. Measures are taken to reduce the cost, such as command classification, realtime processing and resources sharing, the synthesized circuit has an area of about 24 791μm^2 by SMIC 0.18μm technique, which costs about 10.6μW when tested by Primepower. Functional checks were performed by Xilinx FPGA. The circuit works well from the result of logical analyzer, meeting all the requirements. The circuit can be used for the logical part of RFID tag based on ISO/IEC18000-6B protocol.