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低抖动高分辨率线性DCO的设计

Design of a Linear DCO with Low Jitter and High Resolution
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摘要 设计了一个低抖动、高分辨率的线性DCO。该DCO由9级单端倒相器构成,通过分析输出时钟抖动、分辨率与每级倒相器尺寸之间的关系,找到设计的最佳尺寸,最终实现版图。采用SMIC1μm1P8MCMOS工艺,1.2V电源供电,振荡频率为180~580MHz,分辨率为10ps,Hspicerf仿真结果表明,DCO输出时钟为505.67MHz时,峰-峰值抖动为72.159ps。 A linear Digital-Controlled Oscillator (DCO) with low jitter and high resolution is designed. The DCO is composed of 9 single-ended inverters, whose perfect sizes are obtained based on the analysis of the relationship between the jitter or resolution of the clock and the size of the inverters, and at last the layout is achieved. Implemented in a SMIC 0.13μm 1P8M CMOS process with 1.2 V supply voltage, the DCO can operate from 180 MHz to 580 MHz and its resolution is 10 ps. According to Hspicerf simulation results, the Peak-to-Peak jitter is 72. 159 ps when the output frequency is 505.67 MHz.
出处 《电子器件》 CAS 2008年第2期650-652,656,共4页 Chinese Journal of Electron Devices
关键词 ADPLL DCO 抖动 Hspicerf ADPLL DCO jitter Hspicerf
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参考文献8

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