摘要
实验发现动态电压应力条件下,由于栅氧化层很薄,高电平应力时间内隧穿入氧化层的电子与陷落在氧化层中的空穴复合产生中性电子陷阱,中性电子陷阱辅助电子隧穿.由于每个周期的高电平时间较短(远远低于电荷的复合时间),隧穿到氧化层的电子很少,同时低电平应力时间内一部分电荷退陷,形成的中性电子陷阱更少.随着应力时间的累积,中性电子陷阱达到某个临界值,栅氧化层突然击穿.高电平时形成的陷阱较少和低电平时一部分电荷退陷,使得器件的寿命提高.
The experiment result shows that under unipolar voltage stress, electrons tunneling into ultra-thin gate oxide during on-time will recombine with the trapped holes, and neutral electron traps would be generated. These electron traps would assist electrons tunneling into gate oxide. It is proposed that the characteristic time r for the charge to be trapped in SiO2 is longer than the on- time ton of unipolar stress. During the on-time few charges are trapped and during the off-time some trapped charges will be detrapped, thus very few neutral electron traps are generated. With the stress time increasing, the density of neutral electron traps would reach a critical value, and then the gate oxide would break down abruptly. The increase in unipolar breakdown time ^tBD is attributed to fewer charge trapping during the on-time and charge detrapping during the off-time.
出处
《物理学报》
SCIE
EI
CAS
CSCD
北大核心
2008年第4期2524-2528,共5页
Acta Physica Sinica
基金
国家自然科学基金(批准号:60206006)
教育部新世纪优秀人才支持计划(批准号:NCET-05-0851)
国防预研基金(批准号:51308040103)资助的课题~~
关键词
超薄栅氧化层
斜坡电压
经时击穿
ultra-thin gate oxide, ramp voltage, time dependent dielectric breakdown