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基于虚拟可重构电路的演化硬件 被引量:11

Evolvable Hardware Based on Virtual Reconfigurable Circuits
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摘要 针对演化硬件中高效的染色体编码问题,该文采用虚拟可重构电路(VRC)实现内进化方式的演化硬件。VRC是由可重配置功能块(CFB)组成的阵列,CFB之间通过多路选择开关电路建立信号传输通道。染色体可以对CFB的功能选择和多路选择开关状态直接进行编码,以此减少自身的长度。实例证明了该方法的有效性。 The efficient chromosome presentation scheme is an important factor in the implementation of Evolvable Hardware(EHW). The Virtual Reconfigurable Circuits(VRC) are employed to realize an internal evolvable hardware experiment explained in this paper. VRC is an array of Configurable Functional Blocks(CFB). By using of the multiplexers, the routings of the Circuits in CFB can be created effectively. Function choosing of CFB and switching statuses of multiplexers are encoded directly by chromosomes. In this way, the length of chromosome is decreased. Further more, a concrete example is given in order to prove the validity of the method.
出处 《计算机工程》 CAS CSCD 北大核心 2008年第7期243-244,256,共3页 Computer Engineering
基金 国家自然科学基金资助项目“恶劣环境下芯片级自恢复系统的演化硬件机制研究”(60471022)
关键词 演化硬件 现场可编程门阵列 虚拟可重构电路 IP核 Evolvable Hardware(EHW) FPGA Virtual Reconfigurable Circuits(VRC) IP cores
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参考文献7

  • 1Garis H D. Evolvable Hardware: Genetic Programming of a Darwin Machine[C].Proc. of Artificial Neural Nets and Genetic Algorithms. Innsbruck, Austria: Springer-Verlag, 1993: 441-449.
  • 2Lambert C, Kalganova T, Stomeo E. FPGA-based Systems for Evolvable Hardware[C].Proc. of World Academy of Science, Engineering and Technology. Vienna, Austria: [s. n.], 2006: 123-129.
  • 3Porter R, Bergmann N. Evolving FPGA Based Cellular Automata [C].Proc. of Asian-Pacific Conference on Simulated Evolution and Learning. Canberra, Australia: [s. n.], 1998: 114-121.
  • 4Hollingworth G S, Smith S L, Tyrrell A M. Safe Intrinsic EvolUtion of Virtex Devices[C].Proc. of the 2nd NASA/DOD Workshop on Evolvable Hardware. California, USA: [s. n.], 2000: 195-202.
  • 5Higuichi T. Evlovable Hardware at Function Level[C].Proc. of IEEE International Conference on Evolutionary Computation. Indianapolis, Indiana: [s. n.], 1997: 187-192.
  • 6Sekanina L. Virtual Reconfigurable Circuits for Real-World Applications of Evolvable hardware[C].Proc, of NASA/DoD Conference on Evolvable Hardware. Chicago, Illinois, U.S: [s. n.], 2003: 137-166.
  • 7原亮,丁国良,吴文术,娄建安,赵强.以FPGA和QUARTUS为基础平台的EHW环境实现[J].计算机与数字工程,2006,34(5):1-3. 被引量:6

二级参考文献6

  • 1Yao X. Following the path of evolvable hardware[J]. Communications of the ACM, 1999,42(4)
  • 2Yao X, Higuichi T. Promises and Challenges of Evolvable Hardware[J]. IEEE Trans. on Systems Man and Cybernetics- Part C: Applications and Reviews,1999 , 29 (1) : 8797
  • 3HIGUICHI T, et al. Real- world applications of analog and digital evolvable hardware[J]. IEEE Trans on Evolutionary Computation, 2002,3 (3) : 220 - 235
  • 4Stoica A. Evolution of Analog Circuits on Field Programmable Transistor Arrays [C]. In Proc. of the Second NASA/DOD Workshop on Evolvable Hardware (EH'00) , 2000 : 99 - 108
  • 5Peter Ross. On getting an autonomous robot to grow up though experience[C]. IWNICA'2004,2004, 10
  • 6王国庆.演化硬件在容错技术中的应用研究[D].军械工程学院硕士学位论文,2004

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