CMOS电路晶体管级功耗优化方法

Transistor-Level Methodology on Power Optimization for CMOS Circuits

随着集成电路工艺进入纳米时代,在集成电路设计约束重要性方面,功耗已成为与性能等量齐观的设计约束.由于缺少有效的晶体管级时延模拟器,所以现有的低功耗设计技术均为逻辑门级功耗优化方法.受惠于更低的优化颗粒度,晶体管级优化方法具有比逻辑门级方法更强的静态功耗优化能力,因此针对高静态功耗的纳米工艺芯片,开展晶体管级优化方法的研究具有非常重要的意义.基于晶体管级VLSI模拟器,提出了一种新的晶体管级优化方法用于进一步降低静态功耗,它由两个算法步骤构成:先用聚团策略(clustering)在逻辑门空间来提高优化算法的效率,再用粒度较小的晶体管空间优化算法来提高功耗的优化效果.实验证明所提方法具有以下优点:1)该方法适用范围较广,可以分析和优化各种电路.这些电路中,每个晶体管都可以有不同的阈值电压VT0、沟道宽度W和沟道长度L.2)该方法的功耗优化效果较好.在晶体管级W+VT0+L的功耗优化实验中,该方法在不降低动态功耗优化效果的前提(动态功耗平均仅增加0.02%)下,在合理的运行时间(优化C7552仅用856.4s)内,在晶体管级对逻辑门级优化结果进行进一步优化,使静态功耗得到进一步降低,平均降低22.85%,最大降低43%.

With IC technology scaling into nanometer regime, power consumption has become an equal important design constraint as performance. Owing to the shortage of efficient transistor-level delay simulator, previous low-power techniques have to optimize circuits on the gate level. Thanks to the fine granularity, transistor-level low-power design methods can reduce more static power than gate-level counterparts. Thus it is far more important to develop the transistor-level low-power design methodology for nanometer chips marked with high static power. Based on the transistor-level simulator developed, an efficient transistor-level optimization methodology consisting of two-step algorithms is proposed to reduce more static power. The former gate-space algorithm uses the clustering strategy to cut down algorithm complexity. The latter transistor-space algorithm employs fine granularity to pursue reducing more power consumption. Experiments show the following advantages： 1. the proposed methodology is so general that it can analyze and optimize heterogeneous circuit in which each transistor may have its own different VT0, channel width W, and channel length L, and 2. In the transistor-level W ＋ VT0 ＋ L-sized optimization, the engine takes feasible running time （856.4s for C7552） to cut down 22.85% （average） and 43% （maximum） static power caused by gate-level optimum solution nearly without penalty of active power （average active power increases only 0.02 % ）.