摘要
哈希函数在现代加密学中占据很重要的地位。结合"循环打开"和"路径优化"两大硬件优化技术,提出基于FPGA的SHA系列加密算法的高速实现方案。将这一设计应用于嵌入式设备,将提供更高级别的安全保障。与现有的其他实现方案相比,本设计在保持较小面积和相似主频的情况下,可提供更高的加密速率(约提高1.7倍)。
Hash functions play an important role in modem cryptography. A new high-speed implementation of SHA which is based on FPGA is proposed, combining two popular hardware optimization techniques,~ namely ＂partially unrolling＂and ＂path optimization＂. The result can be easily adopted by embedded system, to provide a high degree of security. Compared to other competitive designs, the proposed implementation offers a higher encrypting speed （almost 1.7 times increase）, while it keeps small-size and similar frequency.
出处
《信息技术》
2008年第4期87-90,共4页
Information Technology
关键词
加密
哈希函数
循环打开
预计算
FPGA
encryption
hash functions
partially unpiling
pre-computation
FPGA
