智能函数发生器的VHDL设计与仿真

Design and Simulation of Intelligent Function Signal Generating Device with VHDL

以函数信号发生器的功能为设计对象,运用EDA技术的设计方法,进行各种波形的输入设计、设计处理,项目校验和器件编程。在VHDL语言的编写中按照行为描述,寄存器传输描述,实现了几种波形的软件设计和具体逻辑元件结构的硬件映射。结合FPGA/CPLD的开发集成环境,产生了函数信号发生器的各种信号,同时完成了行为仿真、时序和功能仿真,给出了在GW48-CK型实验开发系统上实现的正弦波形仿真结果。实验表明采用该方法能生成锯齿波、三角波、阶梯波、正弦波等波形,实现了信号发生器的功能,说明该设计是行之有效的。信号发生器功能设计的方法可以推广到其它电子系统的设计中。

This paper takes the function signal generating device function as the design object, using the EDA technology design method to input design each kind of waveform, to carry on design processing, the project verification and the component programming. In the VHDL language compilation according to the behavior description and the register transmission description. Several kinds of the waveform software design and the concrete logic element structure of the hardware mapping were realized. With the FPGA chip and design intelligence function signal, the experiment simultaneously completed the behavior simulation, the succession and function simulation. It also produced the sine waveform simulation map realized in the GW48--CK developmental experiment system. The experiment indicated that by using this method waveforms such as sawtooth, triangle wave, ladder wave, sine wave can be generated. The function of signal generator was realized, which shows the design is effective. The signal generator function design method can be extended to other electronic system designs.