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沟槽栅低压功率MOSFET的发展(上)——减小漏源通态电阻R_(ds(on))

The Development of Low-voltage Trench Gate Power MOSFETs (Part Ⅰ)——Reducing drain-source on-resistance Rds(on)
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摘要 近些年来,采用各种不同的沟槽栅结构使低压MOSFET功率开关的性能迅速提高。本文对该方面的新发展进行了论述。本文上篇着重于降低通态电阻Rds(on)方面的技术发展,下篇着重于降低优值FOM方面的技术发展。 Recently, the performance of low-voltage power switching MOSFET using trench technology has improved rapidly. This article discusses the new developments of these devices. The part-Ⅰ focuses on the technology developments reducing on-resistance. The part-Ⅱ will treat with decreasing Figure of Merit.
作者 吴晓鹏 张娜
机构地区 北京工业大学功率器件及功率集成电路研究室
出处 《中国集成电路》 2008年第5期19-26,共8页 China lntegrated Circuit
关键词 MOSFET 通态电阻 FOM MOSFET, on-resistance, FOM
分类号 TN386 [电子电信—物理电子学]
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参考文献12

  • 1[1]B.Jayant Baliga,"Modem Power Devices".
  • 2[2]Lorenz,L.et al.,"COOLMOSTM-a new milestone in high voltage Power MOS",Proceedings of ISPSD'99,26-28 May 1999,pp.3-10.
  • 3[3]M.A.A.in't Zandt et al.,"Record-low 4 mΩ·mm2 specific on-resistance for 2OV Trench MOSFETs",Proceedings of ISPSD'03,14-17 April 2003,pp.32-35.
  • 4[4]Smerklo,Let al.,"The selection of cell optimal form and cells arrangement on the chip at DMOSFET de-sign",CADSM2003,pp.285
  • 5[5]B.Jayant Baliga et al.,"The Accumulation-Mode Field-Effect Transistor:A New Uhralow On-Resistance MOSFET",IEEE Electron Device Letters,vol.13,NO.8,pp.427-429,1992.
  • 6[6]Syotaro Ono et al.,"3OV new fine trench MOSFET with ultra low on-resistance",Proceedings of ISPSD'03,14-17 April 2003,pp.28-31.
  • 7[7]M.G.L.van den Heuvel et al.,"An inproved method for determining the inversion layer mobility of electrons in trench MOSFETs," Proceedings of ISPSD'03,14-17 April 2003,pp.173-176.
  • 8[8]S.Alves et al.,"Vertical N-channel FLIMOSFETs for Future 12V/42V Dual Batteries Automotive Appli-cations," Proceedings of ISPSD'03,14-17 April 2003,pp.308-311.
  • 9[9]Ritu Sodhi et al.,"High-Density Ultra-low Rdson 30 Volt N-Channel Trench FETs for DC/DC Converter Applications," Proceedings of ISPSD'99,26-28 May 1999,pp.307-310.
  • 10[10]Ⅱ-Yong Park et al.,"Novel Process Techniques for Fabricating High Density Trench MOSFETs with Self-Aligned N+/P+ Source Formed on the Trench Side Wall," Proceedings of ISPSD'03,14-17 April 2003,pp.169-172.
中国集成电路
2008年 第5期

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