基于线程感知寄存器重命名的SMT处理器资源分配

Regulating SMT Resource Allocation via Thread-Sensitive Register Renaming

SMT处理器的资源分配一般是通过调控各线程的取指过程间接实现的,这种间接调控有时会导致资源滥用和饥饿,从而严重浪费资源并降低整体性能.以往的改进措施往往实现代价较大,且不能消除资源分配的"不均衡性",因此效果不太理想.文中提出一种新的SMT处理器资源调控机制——线程感知寄存器重命名TSRR(Thread-Sensitive Register Renaming),消除了资源分配的"不均衡性",其优点如下:(1)资源分配自动适应线程运行状态的变化,实现"按需分配";(2)通过调控重命名寄存器文件(RRF)的分配来间接控制其它资源分配,实现代价较低;(3)兼顾资源分配的效率和公平,既防止了资源滥用和饥饿,又充分发掘各线程的性能潜力.此外,TSRR还可以间接降低RRF的尺寸要求和取指逻辑的复杂度.

SMT processors generally regulate the resource allocation indirectly by controlling the Instruction-Fetch （I-Fetch） process, which may lead to resource misuse and even starvation, incurring resource underutilization and performance depression. Various improving techniques have been proposed; however their effects are discounted due to either being too expensive to imple- ment, or failing in eliminating the imbalance of resource allocation. This paper proposes a novel scheme, Thread-Sensitive Register Renaming （TSRR）, which serves as a resource gating, remarkably eliminating the imbalance of resource allocation and improving the overall performance. TSRR features that： （1） it tracks the performance variations and dynamically tunes the resource amount available to each thread, realizing allocation-on-demand, （2） it is cost-effective because it tunes up all resources just by regulating the allocation of the rename-register-file （RRF）, and （3） concerning both effectiveness and fairness, TSRR prevents both resource misuse and starvation, whereas fully exploits the performance potential of each thread. Meanwhile, TSRR can lessen the RRF size demands and I-Fetch hardware complexities.