时钟信号竞争型边沿触发器

Edge-Triggered FliP-Elops Based on Clock Signal Racing

本文通过对触发器存贮函数的形式变换,导出各种钟控锁存器的结构设计;并根据对一次操作型(边沿操作型)触发器时钟的要求,设计与解释了二类时钟信号竞争型边沿触发器.

On the basis of the form convertions of the flip-flop storage functions, the various structures of clock-controlled latches are designed. According to the clock condition of one-operated (edge-triggered) flip-flops, two types of edge-triggered flip-flops based on clock signal racing are designed and explained.