基于FPGA的波形发生器的设计与实现

Design and realization of waveform generator based on FPGA

以嵌入式微处理器软核NIOS II为核心,将微处理器、总线、数字频率合成器(DDS)、存储器、I/O接口等硬件设备集中在一片FPGA上,创建一个SOPC系统。通过软件编程实现不同频率,不同相位的波形。SoC系统的构建是利用Altera的设计工具Quartus II并结合Verilog-HDL语言,采用硬件编程的方法进行实现的。通过实验验证,本系统达到了预定的要求,并证明了采用软硬件结合,利用DDS技术实现函数波形发生器的方法是可行的。

The paper sets up a SOPC system based on the soft-core named NIOS Ⅱ. The system integrated some units such as microprocessor, bus, figure frequency synthesizer （DDS）, memory, I/O interface on a FPGA. We implement wave of different frequency and phase by program. SoC system is constructed by using tool named Quartus Ⅱ of Ahera and combining verilog-HDL language. Verifying by the experiment, this system reaches the scheduled demand. Meanwhile, we have testified the method that adopt soft to be tied in hardware and make use of the DDS technology to realize the wave generator is feasible.