梯度ZnO低压压敏陶瓷的研制

Development of Gradient ZnO Low-voltage Varistor Ceramics

采用材料梯度化设计思路,将传统电子陶瓷工艺的单层装料一次干压成型工序改进为逐层装料一次干压成型工序。沿着实现ZnO压敏陶瓷低压化的主要途径:减小ZnO压敏电阻器瓷片的厚度和增大ZnO平均晶粒尺寸,在烧结温度1 100℃下,制备出电学性能理想的梯度ZnO低压压敏陶瓷。该陶瓷的压敏电压为8 V/mm,非线性系数为19,漏电流为13μA;其克服了瓷片机械强度劣化及能量耐受能力下降的缺陷。该制备工艺简单,为ZnO压敏电阻器的低压化提供了新方案。

In this paper, the idea of functional gradient materials design is adopted originally in the field of prep- aration of ZnO low-voltage varistor ceramic. The traditional electronic ceramic process of single-layer loading material particles ＆ one-time dry-press molding was substiuted by the one of multilayer loading material particles ＆ onetime dry-press molding. On the basis of the main principles of ZnO low-voltage varistor ceramic, which are dimin- ishing the thickness of the ceramic disc and augmenting the average size of ZnO grains, gradient ZnO low-voltage va- ristor ceramic with good electrical properties has been prepared at the sintering temperature of 1 100 ℃. That varistor ceramic have breakdown voltage of 8 V/mm, nonlinear coefficient of 19 and leakage current of 13μA , with good mechanical strength and energy endurance. The preparation process is simple and provides a new scheme for preparing ZnO low-voltage varistor ceramic.