基于8位CPU核的混合信号SoC验证技术

Mixed-signal SoC Verification Technology Based on 8 Bit CPU Core

数模混合系统芯片(SoC)验证技术是SoC设计中的一个难点。文中基于8051核总线构建一个8位SoC设计验证平台,利用NC-SIM的数字仿真环境和Hsim的模拟仿真环境相结合的方式,对整个混合电路进行验证。该验证环境是建立在IP复用规范的基础上,具有很强的可移植性。同时该环境使用的激励文件和IP可以被一起设计复用,因此在仿真精度和仿真速度都能够得到保障的前提下,可以大大减轻电路混合验证的工作量。通过该混合验证环境,成功设计一个8位SoC芯片,功能和性能指标都达到用户要求。

System verification is one of difficulty for mixed-signal SoC design. A system verification platform in this paper is constructed based on the buses of 8051 core, NC-SIM digital and Hsim analog simulation environment are used to co-verification mixed SoC circuit., This system verification environment is based on IP bus standard to identify the disparities between system modules. Due to being used together in design for stimulus files and IP module, it can greatly reduce verification effort and the simulation precision and the simulation velocity are ensured. A 8-bit SoC is succedfully designed by the mixed verification environment, which obtained consumer recognized on the performance and the function.