基于FPGA的计算机系统原型仿真平台设计

Design of Computer System Prototype Simulation Platform Based on FPGA

如何帮助学生实现认知上从理论到实践的飞越,是传统计算机体系结构教学面临的最大挑战。目的是构建可重构的计算机系统原型仿真实验平台,给学生创造一个设计计算机系统原型的机会。通过FPGA仿真验证和C语言模拟器仿真的方法,以32位乱序流水线的RISC处理器原型为核心,构建了C语言模拟器、RTL仿真器和FPGA仿真验证平台,移植和改造了操作系统、编译器等系统软件和工具链,最终设计和实现了一套完整的计算机系统原型仿真教学实验平台。仿真教学实验平台与目前传统的计算机系统教学实验平台相比,具有较先进的技术水平,并具有开放性,可扩展性,综合性的特点,易于在教学中使用。

It is the most urgent challenge that how to help students make the leap from theoretical knowledge to practical experience. The paper intents to construct a reconfigurable computer system prototype simulation laboratory, and bring students a chance to build a computer system prototype. This paper uses the methodologies of FPGA simulation and C language simulator, and focuses on a 32 bit out - of - order pipelining RISC processor prototype. The C language simulator, the RTL simulator and FPGA verification platform are built. This project also includes other work： porting of system software and tool chain, such as, operation system and compiler. Based on these work, the prototype simulation laboratory for teaching computer system architecture is implemented. Compared to conventional laboratory, this experimentation platform adopts the same advanced technologies and has the features of openness, scalability and integration, so it can be used easily in computer education.