基于FRM的DVB-T接收机中高效滤波器的实现

Realization of High-effective Filter of DVB-T Receiver Based on FRM

针对DVB-T接收机中数字下变频模块对高效滤波的需求,提出了一种采用现场可编程门阵列(FPGA)实现频率响应屏蔽滤波器(FRM)的设计方案,利用分布式算法将乘加运算转化为查找表,并采用分割查找表的方法来解决查找表过大的问题。测试结果表明电路工作正确可靠,满足设计要求。

In allusion to the requirements of efficient filtering in digital down converter of DVB-T receiver, a design of Frequency Response Masking （FRM） filter based on FPGA is proposed. In the proposed design, the Distributed Arithmetic （DA） is used to transform the addition and multiplication into the operation of table lookup, and the partition method of DA is used to solve the problems in large look-up tables. The testing results show that the design is correct, reliable, and can satisfy the need of design.