一种嵌入式存储器内建自测试电路设计

Design of Embedded Memory Built-in Self-test Circuits

随着存储器在芯片中变得越来越重要和半导体工艺到了深亚微米(deep-sub-micron,DSM)时代,对存储器的故障测试变得非常重要,存储器内建自测试(memory built—in self—test,MBIST)是一种有效测试嵌入式存储器的方法;给出了一种基于LFSR的存储器内建自测试电路设计,采用LFSR设计的地址生成器的面积开销相当小,从而大大降低了整个测试电路的硬件开销;16×32b SRAM内建自测试电路设计实验验证了此方法的可行性,与传统的方法相比,它具有面积开销小、工作速度快和故障覆盖率高等优点。

As memories become more dominant in chips and the process of semiconductor moves to deep--sub--micron （DSM） era, testing defects in memories becomes highly important. Memory built--in self--test （MBIST） is very effective in testing embedded memories. A new MBIST circuit based on LFSR （linear feedback shift registers） is presented. The area overhead of address generator based on LFSR is very low, thus the whole hardware overhead of self--test circuit is greatly reduced. The experiment of a 16×32b SRAM BIST circuit verifies the feasibility of the technique, comparing with traditional MBIST structure of SRAM, it is low area overhead, rapid and of high fault coverage.