摘要
基于FIR数字滤波器的原理和层次化、模块化设计思想,结合Altera公司的Cyclone II系列FPGA芯片,提出了FIR数字滤波器的实现硬件方案,给出了采用Matlab、QuartusⅡ设计及实现32阶低通FIR滤波器的方法步骤,仿真及实际测试结果验证了设计方案的正确性,与传统的数字滤波器相比,本文设计的FIR数字滤波器具有更好的实时性、灵活性和实用性。
The paper introduces principle and stratified,modular design idea of FIR digital filter.A hardware design schedule which is using Altera CycloneⅡ family FPGA to realize FIR filter is proposed,the method and process of designing a 32 orders low pass FIR filter using Matlab and Quartus Ⅱ are pointed out.The simulation and practice test demonstrate the correctness of the design.Comparing with traditional digital filter,it has more real-time,flexibility and pracitce characteristics.
出处
《现代电子技术》
2008年第11期89-92,共4页
Modern Electronics Technique
基金
国家自然科学基金资助(60672021)