摘要
由于USB接口广泛应用,现在众多SoC中都嵌入了USB IP核。但当前市场上的USB IP核一般仅仅针对某一种总线结构的SoC,可重用性不强。介绍了一款可配置的USB IP核设计,重点描述USB IP核的结构划分,详细阐述了各模块的设计思想。为了提高USB IP的可重用性,本USB IP核设计了总线适配器,经过简单配置可以用于AMBA ASB总线或WishBone总线结构的SoC中。此IP核进行了FPGA验证,验证结果表明他可作为一个独立的模块嵌入到SoC系统中。
Because USB interface is universal application,USB IP core is embedded in a lot of SoC.But now the USB IPcore on market is used to SoC basing on only a certain bus structure,so the reusable ability is not good.The design of configurable USB IPcore has been described in this article.The stress describes the structure of USB IPcore and the design idea of each module are described in particular.For improving the reusable ability of the USB IPcore,this USB IPcore design the Bus adapter module.After configuring the Bus adapter,this USB IPcore is used to SoC which based on AMBA BUS or WishBone BUS.The result of FPGA implementation indicates that this IPcore is suitable for what is expected and can be used into SoC applications as a single module.
出处
《现代电子技术》
2008年第11期143-145,149,共4页
Modern Electronics Technique
基金
浙江省科技厅重大科技计划(2005Z10052)