基于FPGA的FIR滤波器的设计

Design of FIR Filter Based on FPGA

随着系统实时性要求的提高,对FIR滤波器要求也越来越高。因此,提出了一种基于FPGA的高速FIR滤波器实现方案,并借助QuartusII软件和MATLAB软件对该方案进行了仿真验证。仿真结果表明:该方案设计的FIR滤波器具有运算速度快、实时性好和节省硬件资源的特点,有一定的工程实用性。

With the real-time requirements of the system increase, the FIR filter has higher and higher demands. So an implementation design of high-speed FIR filter based on FPGA is presented, and the design is simulated with Quartus II and Matlab software. The simulation result shows that the design of FIR filter with fast operationspeed,good real-time performance and less hardware resources has certain practicability of projects