基于CPCI总线的高速大容量通用信号处理机

High-Speed General Signal Processor with Great Memory Based on CPCI Bus

利用ADSP-TS201和Virtex-4 FPGA构建高性能分布式并行信号处理机。介绍了处理机的原理、结构和性能指标。采用点对点互连的松耦合结构,具有平衡的处理、存储、传输能力;采用CPCI总线作为主机接口,利用FPGA设计板间自定义LVDS传输接口,具有良好的可扩展性。系统具有14.4 GFLOPS的峰值浮点运算能力和4 GBytes的SDRAM扩展能力,适合高数据流连续实时信号处理。最后介绍了该处理机在合成孔径雷达(SAR)实时成像中的应用。

A high-performance distributed parallel processor is constructed by utilizing ADSPTS201 and Virtex-4 FPGA. The principle, the structure and the performance of the processor are introduced. With a loose-coupled peer to peer architecture, the system has the balanced ability among processing, storing and transferring. The system applies CPCI bus for the host interface and FPGA for the custom LVDS interface, thus the system has good extensibility. With a computational power of up to 14.4 GFLOPS and scalable SDRAM of up to 4 GBytes, the system is suitable for real-time processing with high speed continuous data flow. Finally, its application example on real-time synthetic aperture radar （SAR） imaging is introduced.