倒装芯片封装的FDTD分析

Analysis of Flip-Chip Using FDTD

采用FDTD方法对倒装芯片封装和过孔的不连续性进行分析,在对共面波导加激励源时采用了线激励的方式,降低了编程的难度。同时我们采用高频电磁场分析软件HFSS进行建模仿真,能够得到两种方法的结果比较吻合,验证了文中这种激励方法的可行性。最后分析了采用局部匹配法对倒装芯片不连续性能的改善,使用该方法能够在较宽的频带内获得低于-20dB的回波损耗。

This paper presents simulation result of flip-chip package by FDTD with line source for cpw which reduce the difficulty of program, We also use commercial 3D elctromagnetic field analysis software HFSS to simulate and validate the result of FDTD. Finally, we analysis a locally matching design and obtain refection below -20dB in wide band up to 50GHz.