FPGA上基于Hausdorff距离的图像匹配并行算法设计与实现

Design and Implementation of a Parallel Image Matching Algorithm Using the Hausdorff Distance Measure on FPGA

基于Hausdorff距离的图像匹配算法鲁棒性较好,但计算代价较大,软件实现方案很难满足实时性要求。为了解决这个问题,本文在基于局部Hausdorff距离的图像匹配算法基础上提出了一种鲁棒而实时的FPGA实现方案。为了充分有效利用FPGA的硬件资源,首先对传统串行算法进行并行性分析,提出了一个并行算法;然后以此为基础设计了一种三段式粗粒度流水体系结构,并将其映射到FPGA上进行实现。实验结果表明,该系统在性能上优于其它相关工作,与PC(Pentium42.8GHz)上的软件实现方案相比可以达到接近50倍的加速比。

Image matching algorithms based on the Hausdorff distance are robust enough, but they are too computationally expensive to be used in embedded systems. Software implementations of the algorithms are hardly real-time. A robust and real-time implementation scheme of image matching using the partial Hausdorff distance measure is presented on FPGA. In order to fully utilize the hardware resources on FP（;A, it first proposes a parallel image matching algorithm after the parallel characteristics are analyzed. Then a corresponding architecture implemented on FPGA is introduced, which is organized as a coarse-grained pipeline containing three stages. Experimental results show that our work outperforms the related proposals. A speedup of almost 50 is achieved compared with the software solution on PCs （Pentium 4 2.8 GHz）.