前后端协同的时钟树设计方法

Clock Tree Design Method with Front-end and Back-end Combined

提出一种新的高平衡、高可靠性的前端可控时钟树设计方法,解决时钟树需要在后端工具中多次反复以达到满足性能和功耗要求的问题。阐述了从前端优化和后端约束2个方面入手解决时钟树设计中经常会遇到的问题。在此基础上,将前后端方法结合起来完成时钟树设计。结果验证该方法可以减少大约20%的功耗,同时节省了设计时间,该方法可以广泛应用于基于时钟的同步数字电路设计中。

This paper proposes a new methodology to design highly-balanced and highly-reliable front-end controllable clock tree,and solves the problem that clock tree has to be designed iteratively until performance and power dissipation requirements are met in back-end flow.This paper introduces the problems which may occur in clock tree design,and solutions are proposed from aspects of both front-end optimization and back-end constraints.On the basis,front-end and back-end is combined to form a methodology to achieve clock tree design targets.Results from taped-out chips prove that about 20% of power consumption and design time is saved with this method.This methodology can be used freely in the synchronous design based on clock signals.