基于FPGA的二次雷达编码电路的设计

The Design for Encoding Circuit of SSR Signal Based on FPGA

本文介绍了一种基于Field Programmable Gate Array（FPGA）的二次雷达编码电路设计，它使用VERILOG语言编程实现二次雷达的询问和应答信号。此编码电路内部采用了模块化的设计，其产生的二次雷达信号的脉冲宽度和脉冲间隔可调。

In this paper, a new approach is developed to design the coding circuit of second surveillance radar （SSR） based on FPGA. The encoding circuit adopts VERILOG HDL to realize SSR＇s enquiry and responsion signals. The modularized design is applied inside the coding circuit, the pulse width and pulse interval produced by this coding circuit can be adjustable.