一种基于FPGA的AVS编码加速器的设计

Design of AVS Encoding Accelerator Based on FPGA

为了提高编码速度,结合中国新一代视频压缩标准(Audio Video coding Standard,AVS),提出了一种基于FPGA的编码加速器.编码耗时较多的模块,采用FPGA来实现,以提高编码速度,其他模块用PC机上的软件实现,FPGA与PC之间的通信用PCI-X总线结构.实验结果表明,使用加速器后,编码速度得到大幅度提升.

To improve coding speed, combining China＇s new generation of video compression standard AVS, a FPGA- based coding accelerator is presented. The more time-consuming coding module, are implemented on FPGA to improve coding speed, other modules are implemented on the PC software, FPGA communicates with the PC through the PCI-X bus. Experimental results show that accelerator has greatly increased the speed of coding.