基于共享总线的多处理器cache一致性的硬件实现

Hardware implementation of cache coherence in multiprocessors based on shared bus

龙腾R2微处理器是西北工业大学航空微电子中心设计的采用PowerPC体系结构,具有自主知识产权的R ISC微处理器。为了扩展其多处理器的功能,采用总线侦听的方法来维护多处理器环境下的cache一致性。首先介绍了共享总线侦听技术以及侦听协议,然后详细介绍了龙腾R2微处理器的总线侦听部件的实现方案,对几类cache一致性的实现方案以及性能进行了评析。FPGA实验结果表明,总线侦听部件能高效而准确地保证多处理器系统的cache一致性。

The microprocessor Longtium R2 is a RISC microprocessor design by NWPU AMEC,which is compatible with PowerPC architecture.To expand its function of multiprocessors,the paper introduced the bus snooping technology to maintain cache consistency.Firstly,introduced the shared bus snooping technology and the snoop protocol in multiprocessor circumstance.Secondly,thoroughly gave the implementation of the bus snoop module in Longtium R2.In the end,analyzed some other implementations of cache coherence and their performance.FPGA experiments show that this bus snoop unit can ensure the cache consistency in multiprocessors＇ system correctly and efficiently.