GO-CFAR检测器在FPGA上的实现

Realization of GO-CFAR Detecter Based on FPGA

提出了采用FPGA技术对雷达的视频信号进行GO-CFAR检测,克服了DSP处理速度有限、实时性差和ASIC器件灵活性差的问题。以自行研制的雷达信号处理PCI卡为平台,详细介绍了GO-CFAR算法在FPGA芯片上实现的原理和过程,并结合仿真结果说明了利用FPGA进行恒虚警检测的优势,为雷达恒虚警检测的工程实现提出了一条新思路。

It puts forward that the FPGA is used to realize GO -CFAR detection of radar video signal. This technique could overcome problems on limited processing speed and poor real time performance of DSP. Based on the PCI radar signal processing platform made by our own lab, the principle and course of GO -CFAR algorithm based on FPGA is introduced. The advantages of FPGA are displayed by its combination with simulation results of radar CFAR detection, which supplies a new method for the implementation of radar CFAR detection＇s engineering.