卫星导航接收机中FPGA实现的DDR控制器

DDR Controller Realized with FPGA in Satellite Navigation Receiver

DDR SDRAM高容量和高速度的特点使它在需要大量数据累积的卫星导航长周期码直接捕获中具有广阔的应用前景,但是其接口与目前应用的大多数处理器都不兼容。在分析了DDR SDRAM的基本操作原理的基础上,提出了一种基于Virtex4系列FPGA的DDR SDRAM控制器的设计,解决了DDR SDRAM和处理器接口不兼容的问题,并给出了仿真波形和实现结果。

DDR SDRAM has a good prospect in the acquisition of the long period code of the satellite navigation for its feature of high capacity and high speed. But its interface isn＇ t compatible with most of the processors used currently. This paper explains the operation of DDR SDRAM,presents a design of DDR SDRAM controller based on the series of Virtex4 FPGA, solves the problem that DDR SDRAM isn＇ t compatible with processor interfaces and shows simulation waves and realization results.