基于FPGA的Ethernet解包电路

A design of the Ethernet MAC based on FPGA

针对传统微处理器平台中存在的接口速率瓶颈问题,提出了基于现场可编程门阵列(FPGA)的以太网解包电路的硬件实现方法。主要介绍了接收数据帧的实现方法,该设计具有通用性好、可扩展性强以及方便易行等优点,为高速数据采集系统的网络化提供了很好的解决方案。

Focusing on the problem of the limited speed of interface in the traditional micro processor, this paper presents the clesign of the Ethernet MAC based on FPGA. This paper focuses on the receive module. The design is universal, flexibility and easy to extend, and provides a good solution method for the high speed data acquisition system.