摘要
随着CMOS器件的不断微缩,硅有源区面积的缩小,工艺导致的机械应力对器件的影响越来越显著,许多工艺步骤会造成有源区应力的累积.应力不仅导致器件性能对版图产生依赖性,而且带来各种可靠性问题,影响芯片的长期使用寿命.在很多情况下,应力相关的问题直接影响芯片制造的良率.在总结各种应力来源的基础上,回顾了到目前为止人们所观察或理解的应力对CMOS器件性能和可靠性的各种影响,提出了分析和解决工业生产中应力相关问题的基本思路.
With the continuous downscaling of CMOS technology, process-induced mechanical stress effects become remarkable with the shrinkage of active region. Many processing steps individually or collectively contribute to mechanical stress development. The stress results in not only the layout dependency of device performances, but also diverse reliability issues, which would shorten the chip lifetime. In many cases, stress-related problems are determinative of IC yield. Here, based on the summary of mechanical stress sources, we review the achievements to date in observing and understanding these stress problems, and propose the prospective considerations when analyzing stress-related phenomenon.
出处
《物理学报》
SCIE
EI
CAS
CSCD
北大核心
2008年第7期4497-4507,共11页
Acta Physica Sinica