摘要
分析了IEEE 802.11a中QPSK信号的调制解调原理,给出了一种针对2个支路的FPGA解调的实现方案,并对解调方案进行了软件仿真,得到了正确结果.在此基础上,以EPF10K30AQC208-3芯片作为主芯片,完成了验证调制解调过程的硬件电路设计,并制作电路板硬件实现了该解调过程,经滤波器滤波后从其实部和虚部两路输出得到了正确结果.文中以FPGA为处理器,提出并验证了一种实现物理层中QPSK信号的2个支路解调的新方案.
The principle of modulation and demodulation of QPSK signal in IEEE 802.11 a is analyzed and the implementation scheme on two branches using FPGA is proposed. Software simulation is done on the scheme, and the correct result is obtained. Then the hardware circuit which can testify the process of modulation and demodulation is designed using the main chip EPFIOK30AQC208 - 3. The hardware circuit board is also made and the process of demodulation is achieved. The two outputs after being filtered, the real part and imaginary one are correct. A new scheme to demodulate two branches of QPSK signal in physical layer is proposed and testified using FPGA as the processor.
出处
《烟台大学学报(自然科学与工程版)》
CAS
2008年第3期213-216,共4页
Journal of Yantai University(Natural Science and Engineering Edition)
基金
天津市自然科学基金资助项目(033600111)
关键词
解调
映射
译码
demodulation
mapping
decoding