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一种基于FPGA的通用实时差错隐藏算法

A Universal Realtime Error Concealment Algorithm Based on FPGA
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摘要 整帧图像丢失和部分宏块数据丢失是视频通信中的两种常见现象.由于差错隐藏原理不同,现有算法只能分别处理这两种差错,不利于硬件统一实现.文中通过改进基于光流理论的差错隐藏算法,在处理整帧图像丢失的算法框架中融合处理部分宏块丢失的算法,提出了一种能处理这两种情况的通用差错隐藏算法,并针对FPGA实时处理要求进行了算法优化.仿真结果表明在差错隐藏性能方面,该算法优于H.264参考算法. Whole frame loss and some macrohlocks loss often occur in video communication. Due to the difference between the concealment principles of these two errors, they have to be concealed in different way respectively with existing methods and can not be realized in a single module. This paper introduces a universal error concealment algorithm based on optical flow method. It solved the above mentioned problem by integrating the module of some macroblocks concealment into the architecture of whole frame loss concealment and optimized the algorithm for FPC-A implementation. Simulation results show that the proposed algorithm outperforms the H. 264 reference algorithm in respect of error concealment performance.
出处 《微电子学与计算机》 CSCD 北大核心 2008年第7期21-24,共4页 Microelectronics & Computer
关键词 H.264解码器 差错隐藏 光流 边界匹配 H.264 decoder error concealment optical flow boundary match
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参考文献5

  • 1Bandyopadhyay S, Wu Z, Pandit P, et al. Frame loss error concealment for H. 264/AVC[ C]//Joint Video Team of ISO/IEC MPEG & ITU - T VCEG. JVT - P072. Poland, 2005.
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