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一种自动生成状态机RTL代码的方法 被引量：2

A Method of Generating RTL Codes of State Machine Automatically
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摘要 集成电路设计中,状态机的代码实现具有一定规律性.根据该规律通过某种方法自动生成状态机RTL代码,可以提高设计设计效率.此项方法首先由Matlab中的Stateflow工具输入状态转移图,利用基于Tcl/Tk的软件提取其中有用信息,再进行状态机RTL代码生成,完成转换过程.该软件的成功设计和应用证明了此方法的可行性和实用性. Some general rules can be found in the design of state machine. According to these roles, design efficiency would be improved a lot that is realized by some method which is used to generate RTL codes of the state machines automatically. Firstly, it creates a state-transition chart by Stateflow toolkit of Matlab, and then extract the useful information from the charts through a software based on Tcl/Tk, finnally outputs the RTL codes. The sucessful design and implementation of this software confirms the feasibility and practicability of the method.
作者 詹璨铭 李广军 阎波 冯健
机构地区 电子科技大学通信与信息工程学院 电子科技大学电子工程学院
出处 《微电子学与计算机》 CSCD 北大核心 2008年第7期157-159,165,共4页 Microelectronics & Computer
关键词 EDA 状态机 TCL/TK VERILOG HDL EDA state machine Tcl/Tk Verilog HDL
分类号 TN402 [电子电信—微电子学与固体电子学]
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微电子学与计算机
2008年 第7期

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