32位可重构多功能乘法器的设计与实现

A Design of 32-Bit Reconfigurable Multi-Function Multiplier

为了提高计算机硬件的利用率,及改善计算性能,提出了一种32位可重构多功能乘法器的实现方法,并能完成8位有符号、无符号,16位有符号、无符号,32位有符号、无符号的乘法,共6种乘法计算功能,并用verilog实现了设计,进行了仿真,得到了正确的结果.

To improve the efficiency of the hardware, and advance the performance of the computer, in this article, a new implementation method about the 32-bit multi-function multiplier is introduced. It is also designed to complete multiply of 8-bit or 16-bit or 32-bit signed or unsigned number , then implement the design with verilog ,and get the right result by simulate the design.