基于功能的SoC可测试性设计及系统级调试

SoC DFT Design Based on Function and ESL Debug

可测试性设计技术是SoC设计中的一个重要技术。在设计8位SoC系统芯片时,不仅考虑到可测试性设计,而且还利用OCI模块上的JTAG接口。可以方便地与板级系统相结合,能够快速对芯片进行功能验证和系统调试,大大缩短产品的上市时间。

Design for testability （DFT） has become one of the important parts in SoC design. It is not only thought of DFT when 8 bit SoC chip is designed, but utilized JTAG interface on OCI module. Thus it is conveniently to connected with board system to fast verify chip function and debug system, distinctly short time-to-market.