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分布式算法在FIR数字滤波器实现中的应用 被引量:5

Application of Distributed Algorithms in Realization of FIR Digital Filter
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摘要 文章提出了一种利用FPGA实现FIR数字滤波器的设计方案,在设计过程中应用了分布式算法(DA)。FPGA有着规整的内部逻辑阵列和丰富的连线资源,特别适合于数字信号处理任务。分布式算法(DA)是一项重要的FPGA技术,它使得在FPGA中实现FIR滤波器的关键运算——乘加运算,转化为了查找表,大大提高了FIR滤波器的速度。文中给出了VHDL语言编写的程序和仿真波形。 A design is suggested, which realizes the Finite Impulse Response digital filter by using the Field Programmable Gate Array. Distributed Algorithm is applied to the design. The Field Programmable Gate Array has well-regulated internal logic cell array and abundant resource of the Interconnect, so it is suitable for the task of digital signal processing. Distributed Algorithm is an important technology of the Field Programmable Gate Array. It uses the Look Up Table instead of the multiply accumulation operation of arithmetic, thus speed up the Finite Impulse Response digital filter based on the Field Programmable Gate Array. The paper gives the programme of the digital filter compiled with VHSIC Hardware Description Language, and the simulation waveform.
作者 李梅 王兰勋
出处 《通信技术》 2008年第8期15-16,19,共3页 Communications Technology
关键词 FIR 数字滤波器 分布式算法 FPGA Finite Impulse Response Digital Filter Distributed Algorithm Field Programmable Gate Array
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  • 1[3]藏春华,郑步生,魏小龙.电子设计自动化技术[M].北京:机械工业出版社,2004.

共引文献9

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  • 1王黎明,刘贵忠,刘龙,刘洁瑜.一种基于FPGA的并行流水线FIR滤波器结构[J].微电子学,2004,34(5):582-585. 被引量:10
  • 2陈杨生,颜钢锋.硬件实现基于BP神经网络设计的带阻FIR滤波器[J].浙江大学学报(工学版),2006,40(7):1146-1149. 被引量:1
  • 3杨大柱.MATLAB环境下FIR滤波器的设计与仿真[J].电子技术应用,2006,32(9):101-103. 被引量:14
  • 4Michael D Ciletti. Advanced Digital Design with The Verilog HDL[M]. [s. l. ]:Publishing House of Electronics Industry, 2007.
  • 5Uwe M B.数字信号处理的FPGA实现[M].2版.刘凌译.北京:清华大学出版社,2006.
  • 6Ingle V K, Proakis J G. Digital signal processing using MATLAB[ M]. 2nd ed. Xian:Xian Jiaotong University Press, 2007.
  • 7Bouzid A, Aladin S. Design and implementation of digital bandpass fir filter in FPGA[J].Computers in Education ,2004,1:76 - 81.
  • 8Mallat S. A wavelet tour of signal processing (2ed)[M]. 2nd ed. Beijing: Academic Press,2003:8 - 51.
  • 9Salim T, Devlin J, Whittington J, et al. An efficient serial distributed arithmetic algorithm for FPGA implementation of digital up conversion [J].Complexity,2005,11 ( 1 ) :24 -29.
  • 10Dick C, Harris F. FPGA DSPs-the platform for NG wireless communications [J]. R. F. Design, 2000,23 (10) :56 -66.

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